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XR-215A ...the analog plus company tm monolithic phaselocked loop rev. 1.01 1996 exar corporation, 48720 kato road, fremont, ca 94538 (510) 668-7000 (510) 668-7010 1 june 1997-3 features wide frequency range: 0.5hz to 25mhz wide supply voltage range: 5v to 26v wide dynamic range: 300 v to 3v, nominally on-off keying and sweep capability wide tracking range: adjustable from + 1% to + 50% high-quality fm detection: distortion 0.15% signal/noise 65db applications fm demodulation frequency synthesis fsk coding/decoding (modem) tracking filters signal conditioning tone decoding data synchronization telemetry coding/decoding fm, fsk and sweep generation crystal-controlled pll wideband frequency discrimination voltage-to-frequency conversion general description the XR-215A is a highly versatile monolithic phase- locked loop (pll) system designed for a wide variety of applications in both analog and digital communication systems. it is especially well suited for fm or fsk demodulation, frequency synthesis and tracking filter applications. the XR-215A can operate over a large choice of power supply voltages ranging from 5v to 26v and a wide frequency band of 0.5hz to 25mhz. it can accommodate analog signals between 300mv and 3v. ordering information part no. package operating temperature range XR-215Acp 16 lead 300 mil pdip 0 c to 70 c XR-215Acd 16 lead soic (jedec, 0.300o) 0 c to 70 c
XR-215A 2 rev. 1.01 9 v ee 16 v cc 4 phcp1 6 phcp2 1 opamp 7 comp phase comparator op amp 2 pco1 3 pco2 8 opampo 15 vcoo vco 5 bias 12 vsi 11 vgc 10 rgs 14 tci2 13 tci1 figure 1. XR-215A block diagram
XR-215A 3 rev. 1.01 pin configuration 16 lead 300 mil pdip v cc vcoo tci2 tci1 vsi vgc rgs v ee opamp pco1 pco2 phcp1 bias phcp2 comp opampo 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 v cc vcoo tci2 tci1 vsi vgc rgs v ee opamp pco1 pco2 phcp1 bias phcp2 comp opampo 16 lead soic (jedec, 0.300o) 16 1 9 8 2 3 4 5 6 7 15 14 13 12 11 10 pin description pin # symbol type description 1 opamp i operational amplifier input. 2 pco1 o phase comparator output 1. 3 pco2 o phase comparator output 2. 4 phcp1 i phase comparator input 1. 5 bias i phase comparator bias input. 6 phcp2 i phase comparator input 2. 7 comp i operational amplifier frequency compensation input. 8 opampo o operational amplifier output. 9 v ee - negative power supply. 10 rgs i range select input. 11 vgc i vco gain control. 12 vsi i vco sweep voltage input. 13 tci1 i timing capacitor input. the timing capacitor connects between this pin and pin 14. 14 tci2 i timing capacitor input. the timing capacitor connects between this pin and pin 13. 15 vcoo o vco output. 16 v cc - positive power supply.
XR-215A 4 rev. 1.01 dc electrical characteristics test conditions: v cc = 12v (single supply), t a = 25 c, test circuit of figure 3 with c 0 = 100 pf, (silver-mica) s 1 ,s 2 , s 5 , closed, s 3 , s 4 open unless otherwise specified. parameter min. typ. max. unit. conditions general characteristics supply voltage single supply 5 26 v figure 3 split supply + 2.5 + 13 v figure 4 supply current 8 11 15 ma figure 3 upper frequency limit 20 25 mhz figure 3 , s 1 open, s 4 closed lowest practical operating frequency 0.5 hz c 0 = 500 f (non-polarized) vco section stability: temperature 250 600 ppm/ c see figure 7 , 0 c t t < 70 c power supply 0.1 %/v v cc > 10v sweep range 5:1 8:1 s 3 closed, s 4 open, 0 < v s < 6v see figure 10, c 0 = 2000pf output voltage swing 1.5 2.5 vp-p s 5 open rise time 20 ns fall time 30 ns 10pf to ground at pin 15 phase comparator section conversion gain 2 v/rad v in > 50mv rms (see characteristic curves) output impedance 6 k measured looking into pins 2 or 3 output offset voltage 20 100 mv measured across pins 2 and 3 v in = 0, s 5 open op amp section open loop voltage gain 66 80 db s 2 open slew rate 2.5 v/ sec a v = 1 input impedance 0.5 2 m output impedance 2 k output swing 7 10 vp-p r l = 30k from pin 8 to ground input offset voltage 1 10 mv input bias current 80 na common mode rejection 90 db note: bold face parameters are covered by production test and guaranteed over operating temperature range.
XR-215A 5 rev. 1.01 dc electrical characteristics (cont'd) parameter min. typ. max. unit conditions special applications a) fm demodulation test conditions: test circuit of figure 5 , v cc = 12v , input signal = 10.7mhz fm with f = 75khz . f mod = 1khz. detection threshold 0.8 3 mv rms 50 source demodulated output amplitude 500 mv rms measured at pin 8 distortion (thd) 0.15 0.5 % am rejection 40 db v in = 10mv rms, 30% am output signal/noise 65 db b) tracking filter test conditions: test circuit of figure 6 , v cc = 12v , f o = 1 mhz , v in = 100mv rms, 50 source. tracking range (% of f o ) + 50 see figure 5 and figure 25 discriminator output v out f / f o 50 mv/% adjustable - see applications information note: bold face parameters are covered by production test and guaranteed over operating temperature range. specifications are subject to change without notice absolute maximum ratings power supply 26 volts . . . . . . . . . . . . . . . . . . . . . . . . . . . power dissipation (package limitation) plastic package 625mw . . . . . . . . . . . . . . . . . . . . . . . . derate above 25 c 5mw/ c . . . . . . . . . . . . . . . . . . . . soic package 500mw . . . . . . . . . . . . . . . . . . . . . . . . . derate above 25 c 4mw/ c . . . . . . . . . . . . . . . . . . . . temperature storage -65 c to +150 c . . . . . . . . . . . . . . . . . . . . . . .
XR-215A 6 rev. 1.01 6 figure 2. equivalent schematic diagram 1 16 2 3 5 4 11 14 13 15 12 7 8 9 10 system description the XR-215A monolithic pll system consists of a balanced phase comparator, a highly stable voltage- controlled oscillator (vco) and a high speed operational amplifier. the phase comparator outputs are internally connected to the vco inputs and to the noninverting input of the operational amplifier. a self-contained pll system is formed by simply ac coupling the vco output to either of the phase comparator inputs and adding a low-pass filter to the phase comparator output terminals. the vco section has frequency sweep, on-off keying, sync, and digital programming capabilities. its frequency is highly stable and is determined by a single external capacitor. the operational amplifier can be used for audio preamplification in fm detector applications or as a high speed sense amplifier (or comparator) in fsk demodulation. description of circuit controls phase comparator inputs (pins 4 and 6) one input to the phase comparator is used as the signal input. the remaining input should be ac coupled to the vco output (pin 15) to complete the pll (see figure 3 ). for split supply operation, these inputs are biased from ground as shown in figure 4. for single supply operation, a resistive bias string similar to that shown in figure 3 should be used to set the bias level at approximately v cc /2. the dc bias current at these terminals is nominally 8 a. phase comparator bias (pin 5) this terminal should be dc biased as shown in figure 3 and figure 4 , and ac grounded with a bypass capacitor. phase comparator outputs (pins 2 and 3) the low frequency (or dc) voltage across these pins corresponds to the phase difference between the two signals at the phase comparator inputs (pins 4 and 6). the phase comparator outputs are internally connected to the vco control terminals (see figure 2. ) one of the outputs (pin 3) is internally connected to the noninverting input of the operational amplifier. the low-pass filter is achieved by connecting an rc network to the phase comparator outputs as shown in figure 15.
XR-215A 7 rev. 1.01 16 v cc figure 3. test circuit for single supply operation +12v 0.1 f 0.1 f 5k 5k signal input sweep input v s u1 XR-215A s 3 1k 5k 0.1 f 2k 2k 0.1 f s 5 vco output 0.068 f demodulated output 10k s 2 300pf r f 100k r p 10k 10k 750 5pf s 1 100pf s 4 2nf 2nf 50 50 phase comp. vco 6 11 12 10 913 14 23 1 7 8 15 4 5 v ee op amp
XR-215A 8 rev. 1.01 16 v cc 13 op amp figure 4. test circuit for split-supply operation 0.1 f +6v 0.1 f u1 XR-215A 5k 0.1 f 2k signal input 50 2k 0.1 f 2k vco output demodulated output 100pf 10k 10k 300pf r f 100k r p 10k -6v 750 s 4 -6v 2nf 2nf 50 50 phase comp. vco 11 12 10 9 14 3 1 7 15 4 8 6 2 v ee 5 0.068 f
XR-215A 9 rev. 1.01 16 v cc figure 5. test circuit for fm demodulation 0.1 f 0.1 f +12v u1 XR-215A 0.1 f 2k 3k fm input (50 source) 2k 1k 0.1 f vco output 10k demodulated output 10nf 300pf r f 100k r p 10k 7.5k 30pf 750 50 50 1nf 1nf phase comp. 6 11 12 10 v ee vco 13 914317 2 op amp 5 4 15 8
XR-215A 10 rev. 1.01 16 v cc figure 6. test circuit for tracking filter +12v 5k 5k 0.1 f signal input 50 r 0 2k u1 XR-215A 0.1 f 2k 0.1 f 2k 0.1 f 10k demodulated output vco output 1k r f 40k 300pf c 0 200pf 50 50 r p 20k 5nf 5nf 6 11 12 10 913 14 2 31 7 phase comp. vco 8 4 5 op amp 15 v ee
XR-215A 11 rev. 1.01 ???????????????? ???????????????? ???????????????? ???????????????? ???????????????? ???????????????? ???????????????? ???????????????? ???????????????? ???????????????? figure 7. typical vco temperature coefficient range as a function of operating frequency (pin 10 open) -800 -400 0 400 800 10khz 100khz 1mhz 10mhz vco frequency (hz) v cc = 12v r 0 = 5k vco temperature coefficient (ppm/ c) figure 8. vco free running frequency vs. timing capacitor ???????????????? ???????????????? ???????????????? ???????????????? ???????????????? ???????????????? ???????????????? ???????????????? ???????????????? ???????????????? ???????????????? ???????????????? rx=750 between pins 9 & 10 pin 10 open 10 7 10 2 10 3 10 4 10 5 10 6 10 10 7 10 6 10 5 10 4 10 3 10 2 vco frequency (hz) timing capacitance c (pf) 0
XR-215A 12 rev. 1.01 vco timing capacitor (pins 13 and 14) the vco free-running frequency, f o , is inversely proportional to timing capacitor c 0 connected between pins 13 and 14. (see figure 8. ) vco output (pin 15) the vco produces approximately a 2.5vp-p output signal at this pin. the dc output level is approximately 2 volts below v cc . this pin should be connected to pin 9 through a 10k resistor to increase the output current drive capability. for high voltage operation (v cc > 20v), a 20k resistor is recommended. it is also advisable to connect a 500 resistor in series with this output for short circuit protection. 0.1 1 10 100 1000 ???????????????? ???????????????? ???????????????? ???????????????? ???????????????? ???????????????? ???????????????? ???????????????? ???????????????? ???????????????? ???????????????? ???????????????? high level input constant = 1v rms 2v/rad low level input input amplitude (mv rms) 1.0 0.1 0.01 figure 9. phase comparator conversion gain, k d , versus input amplitude phase comparator conversion gain k d
XR-215A 13 rev. 1.01 ???????????????????????? ???????????????????????? ???????????????????????? ???????????????????????? ???????????????????????? ???????????????????????? ???????????????????????? ???????????????????????? ???????????????????????? ???????????????????????? ???????????????????????? ???????????????????????? ???????????????????????? ???????????????????????? ???????????????????????? ???????????????????????? ???????????????????????? ???????????????????????? figure 10. typical frequency sweep characteristics as a function of applied sweep voltage r x = r x =750 bias pins 1,4,5,6 to v cc /2 5 4 3 2 1 +2 0 -2 -4 -6 -8 -10 -12 co 2k vs vco 2k rx v cc output fo 12 11 16 14 13 15 10 9 r s net applied sweep voltage v s - v so (volts) normalized frequency (f/fo) note: v so v cc - 5v = open circuit voltage at pin 12
XR-215A 14 rev. 1.01 ??????????????????????? ??????????????????????? ??????????????????????? ??????????????????????? ??????????????????????? ??????????????????????? ??????????????????????? ??????????????????????? ??????????????????????? ??????????????????????? ??????????????????????? ??????????????????????? ??????????????????????? ??????????????????????? ??????????????????????? ??????????????????????? ??????????????????????? ??????????????????????? figure 11. XR-215A op amp frequency response 8 v out 0.1 f 1 r s 1k v in 3 c c open loop response a v = 100 r f = 100k a v = 1000 r f = 1m a v = 10 c c = 50pf; r f = 10k a v = 1 c c = 300pf; r f = 1k 100 80 60 40 20 0 -20 100h 1khz 10khz 100khz 1mhz 10mhz r f voltage gain (db) frequency vco sweep input (pin 12) the vco frequency can be swept over a broad range by applying an analog sweep voltage, v s , to pin 12 (see figure 10. ) the impedance looking into the sweep input is approximately 50 . therefore, for sweep applications, a current limiting resistor, r s , should be connected in series with this terminal. typical sweep characteristics of the circuit are shown in figure 10. the vco temperature dependence is minimum when the sweep input is not used. caution: for safe operation of the circuit, the maximum current, i s , drawn from the sweep terminal should be limited to 5ma or less under all operating conditions. on-off keying: with pin 10 open circuited, the vco can be keyed off by applying a positive voltage pulse to the sweep input terminal. with r s = 2k , oscillations will stop if the applied potential at pin 12 is raised 3 volts above its open-circuit value. when sweep, sync, or on-off keying functions are not used, r s is not necessary.
XR-215A 15 rev. 1.01 figure 12. explanation of vco range-select controls range select > 3v, f 1 internal bias i 1 i 2 t 1 t 2 600 1.3v 10 r x input 0v, fo 9 fo = f1(1+(0.6/r x )) range-select (pin 10) the frequency range of the XR-215A can be extended by connecting an external resistor, r x , between pins 9 and 10. with reference to figure 12 , the operation of the range-select terminal can be explained as follows: the vco frequency is proportional to the sum of currents i 1 and i 2 through transistors t 1 and t 2 on the monolithic chip. these transistors are biased from a fixed internal reference. the current i 1 is set internally, whereas i 2 is set by the external resistor r x . thus, at any c 0 setting, the vco frequency can be expressed as: f 0 f 1 1 0.6 r x where f 1 is the frequency with pin 10 open circuited and r x is in k . external resistor r x ( 750 ) is recommended for operation at frequencies in excess of 5mhz. the range select terminal can also be used for fine tuning the vco frequency, by varying the value of r x . similarly, the vco frequency can be changed in discrete steps by switching in different values of r x between pins 9 and 10. digital programming using the range select control, the vco frequency can be stepped in a binary manner, by applying a logic signal to pin 10, as shown in figure 12. for high level logic inputs, transistor t 2 is turned off, and r x is effectively switched out of the circuit. using the digital programming capability, the XR-215A can be time-multiplexed between two separate input frequencies, as shown in figure 19 and figure 20. amplifier input (pin 1) this pin provides the inverting input for the operational amplifier section. normally it is connected to pin 2 through a 10 k external resistor (see figure 3 or figure 4. )
XR-215A 16 rev. 1.01 amplifier output (pin 8) this pin is used as the output terminal for fm or fsk demodulation. the amplifier gain is determined by the external feedback resistor, r f , connected between pins 1 and 8. frequency response characteristics of the amplifier section are shown in figure 11. amplifier compensation (pin 7) the operational amplifier can be compensated for unity gain by a single 300pf capacitor from pin 7 to ground. (see figure 11. ) basic phase-locked loop operation principle of operation the phase-locked loop (pll) is a unique and versatile circuit technique which provides frequency selective tuning and filtering without the need for coils or inductors. as shown in figure 13 , the pll is a feedback system comprised of three basic functional blocks: phase comparator, low-pass filter and voltage-controlled oscillator (vco). the basic principle of operation of a pll can be briefly explained as follows: with no input signal applied to the system, the error voltage v d , is equal to zero. the vco operates at a set frequency, f o , which is known as the afree-runningo frequency. if an input signal is applied to the system, the phase comparator compares the phase and frequency of the input signal with the vco frequency and generates an error voltage, v e (t), that is related to the phase and frequency difference between the two signals. this error voltage is then filtered and applied to the control terminal of the vco. if the input frequency, fs, is sufficiently close to f o , the feedback nature of the pll causes the vco to synchronize or alocko with the incoming signal. once in lock, the vco frequency is identical to the input signal, except for a finite phase difference. a linearized model for pll when the pll is in lock, it can be approximated by the linear feedback system shown in figure 14. s and o are the respective phase angles associated with the input signal and the vco output, f(s) is the low-pass filter response in frequency domain, and k d and k o are the conversion gains associated with the phase comparator and vco sections of the pll. definition of XR-215A parameters used for pll applications design vco free-running frequency, f o the vco frequency with no input signal is determined by selection of c 0 across pins 13 and 14 and can be increased by connecting an external resistor r x between pins 9 and 10. it can be approximated as: f 0 220 c 0 1 0.6 r x where c 0 is in f and r x is in k . (see figure 8. ) figure 13. block diagram of a phase-locked loop f s input signal v s (t) phase comparator lowpass filter vco v e (t) v d (t) v d (t) f o v o (t)
XR-215A 17 rev. 1.01 figure 14. linearized model of a pll as a negative feedback system f(s) k d 0 s ko s - phase comparator gain k d the output voltage from the phase comparator per radian of phase difference at the phase comparator inputs (pins 4 and 6). the units are volts/radians. (see figure 9. ) vco conversion gain ko the vco voltage-to-frequency conversion gain is determined by the choice of timing capacitor c 0 and gain control resistor, r 0 connected externally across pins 11 and 12. it can be expressed as: 700 c 0 r 0 k 0 (radians/sec/volt) where c 0 is in f and r 0 is in k . for most applications, recommended values for r 0 range from 1k to 10k . lock range ( wl) the range of frequencies in the vicinity of f o , over which the pll can maintain lock with an input signal. it is also known as the atrackingo or aholdingo range. if saturation or limiting does not occur, the lock range is equal to the loop gain, i.e. l = k t = k d k o . capture range ( wc) the band of frequencies in the vicinity of f o where the pll can establish or acquire lock with an input signal. it is also known as the aacquisitiono range. it is always smaller than the lock range and is related to the low-pass filter bandwidth. it can be approximated by a parametric equation of the form: c l |f(j c )| where |f(j c | is the low-pass filter magnitude response at = c . for a simple lag filter, it can be expressed as: l t 1 c where t 1 is the filter time constant. amplifier gain av the voltage gain of the amplifier section is determined by feedback resistors r f and rp between pins (8,1) and (2,1) respectively. (see figure 3 and figure 4. ) it is given by: r f r 1 r p a v where r 1 is the (6k ) internal impedance at pin 2.
XR-215A 18 rev. 1.01 low-pass filter the low-pass filter section is formed by connecting an external capacitor or rc network across terminals 2 and 3. the low-pass filter components can be connected either between pins 2 and 3 or, from each pin to ground. typical filter configurations and corresponding filter transfer functions are shown in figure 15 where r 1 (6k ) is the internal impedance at pins 2 and 3. it should be noted that the rejection of the low pass filter decreases above 2mhz when the capacitor is tied from pin 2 to 3. figure 15. 23 r 2 c 1 lag lead filter 23 c 1 c 1 r 2 r 2 1 = 2r 1 c 1 c 1 23 c 1 c 1 23 1 = 2r 1 c 1 lag filter 1 s 1 f(s) = f(s) = f(s) = 1 = r 1 c 1 1 + s 2 1 + s( 1 + 2 ) 1 + s 2 1 + s( 1 + 2 ) 1 = r 1 c 1 1 s 1 f(s) = 2 = r 2 c 1 2 = r 2 c 1 note: r 1 = 6k internal resistor. the natural frequency n can be calculated from the vco conversion gain k 0 , the phase comparator conversion gain k d , and the low pass filter time constants 1 and 2 as follows: 2 1 k 0 k d n 2 then the damping factor can be calculated using: n k 0 k d 1 2
XR-215A 19 rev. 1.01 16 v cc figure 16. circuit connection for fm demodulation +12v 5k 5k fm input u1 XR-215A 2k 0.1 f cc r 0 0.1 f 2k cc 300pf demodulated output 2k 8k 7.5k r f volume control 10nf (de-emphasis) c 0 r x 50 c 1 50 c 1 r p 10k cc coupling capacitor phase comp. 5 op amp 8 4 15 7 1 3 2 14 13 9 v ee 10 12 11 6 applications information fm demodulation figure 16 shows the external circuit connections to the XR-215A for frequency-selective fm demodulation. the choice of c 0 is determined by the fm carrier frequency (see figure 8. ) the low-pass filter capacitor c 1 is determined by the selectivity requirements. for carrier frequencies of 1 to 10mhz, c 1 is in the range of 10 ? c 0 to 30 ? c 0 . the feedback resistor r f can be used as a avolume-controlo adjustment to set the amplitude of the demodulated output. the demodulated output amplitude is proportional to the fm deviation and to resistors r 0 and r f for + 1% fm deviation it can be approximated as: v out r 0 r f 1 0.6 r x mv , rms where all resistors are in k and r x is the range extension resistor connected across pins 9 and 10. for circuit operation below 5mhz, r x can be omitted. for operation above 5mhz, r x 750 is recommended. typical output signal/noise ratio and harmonic distortion are shown in figure 17 and figure 18 as a function of fm deviation, for the component values shown in figure 5.
XR-215A 20 rev. 1.01 multi-channel demodulation the ac digital programming capability of the XR-215A allows a single circuit be time-shared or multiplexed between two information channels, and thereby selectively demodulate two separate carrier frequencies. figure 19 shows a practical circuit configuration for time-multiplexing the XR-215A between two fm channels, at 1mhz and 1.1mhz respectively. the channel-select logic signal is applied to pin 10, as shown in figure 19 with both input channels simultaneously present at the pll input (pin 4). figure 20 shows the demodulated output as a function of the channel-select pulse where the two inputs have sinusoidal and triangular fm modulation respectively. figure 17. output signal/noise ratio as a function of fm deviation ???????????????? ???????????????? ???????????????? ???????????????? ???????????????? ???????????????? ???????????????? ???????????????? ???????????????? ???????????????? ???????????????? f o =10 mhz f mod = 1 khz v in = 20 mv rms (test circuit of figure 5 ) 100 80 60 40 0.01% 0.1% 1.0% 100% 10% frequency deviation f/f o figure 18. output distortion as a function of fm deviation ??????????????? ??????????????? ??????????????? ??????????????? ??????????????? ??????????????? ??????????????? ??????????????? ??????????????? 1% 0.5% 0 0.01% 0.1% 1.0% 100% 10% f o =10mhz f mod = 1khz v in = 20 mv rms v out = constant @ 2 v pp (test circuit of figure 5 ) demodulated output signal / noise (db) frequency deviation f/f o distortion (thd)
XR-215A 21 rev. 1.01 v cc 16 figure 19. time-multiplexing XR-215A between two simultaneous fm channels u1 XR-215A channel 2 f 2 =1.1mhz channel 1 f 1 =1mhz 1k 0.1 f 0.1 f +5v 1k demodulated output 10nf (de-emphasis) 7.5k 10nf 10nf -5v 10k 300pf 300pf co 100k 3k co 220pf r 0 3k r x 6k 1k channel select -5v 0v f o =f 1 -5v f o =f 2 10k r p 10k c c coupling capacitor 4nf 4nf phase comp. 5 op amp 8 4 15 7 1 3 2 14 13 9 v ee 10 12 11 6 vco
XR-215A 22 rev. 1.01 figure 20. demodulated output waveforms for time-multiplexed operation demodulated output channel select pulse fsk demodulation figure 21 contains a typical circuit connection for fsk demodulation. when the input frequency is shifted, corresponding to a data bit, the dc voltage at the phase comparator outputs (pins 2 and 3) also reverses polarity. the operational amplifier section is connected as a comparator, and converts the dc level shift to a binary output pulse. one of the phase comparator outputs (pin 3) is ac grounded and serves as the bias reference for the operational amplifier section. capacitor c 1 serves as the pll loop filter, and c 2 and c 3 as post-detection filters. range select resistor, r x , can be used as a fine-tune adjustment to set the vco frequency. typical component values for 300 baud and 1200 baud operation are listed below: operating conditions typical component values 300 baud low band: f 1 = 1070hz f 2 = 1270hz high band: f 1 = 2025hz f 2 = 2225hz r 0 = 5k , c 0 = 0.17 f c 1 = c 2 = 0.047 f, c 3 = 0.033 f r 0 = 8k , c 0 = 0.1 f c 1 = c 2 = c 3 = 0.033 f 1200 baud f 1 = 1200hz f 2 = 2200hz r 0 = 2k , c 0 = 0.12 f c 1 = c 3 = 0.003 f c 2 = 0.01 f table 1. typical component values for modems note: for 300 baud operation the circuit can be time-multiplexed be- tween high and low bands by switching the external resistor r x in and out of the circuit with a control signal, as shown in figure 12. fsk generation the digital programming capability of the XR-215A can be used for fsk generation. a typical circuit connection for this application is shown in figure 22. the vco frequency can be shifted between the mark (f 2 ) and space (f 1 ) frequencies by applying a logic pulse to pin 10. the circuit can provide two separate fsk outputs: a low level (2.5 vp-p) output at pin 15 or a high amplitude (10 vp-p) output at pin 8. the output at each of these terminals is a symmetrical squarewave with a typical second harmonic content of less than 0.3%.
XR-215A 23 rev. 1.01 16 v cc figure 21. circuit connection for fsk demodulation 0.1 f +12v 5k 5k u1 XR-215A 2k fsk input r o 2k 0.1 f 0.1 f 10k v out 10v pp 8k 1 f 10k 10k 2k c 0 r x 5k c 1 c 2 c 3 0.1 f phase comp. vco 5 8 4 15 7 1 3 2 14 13 9 v ee 10 12 11 6 op amp
XR-215A 24 rev. 1.01 8 16 v cc figure 22. circuit connection for fsk generation u1 XR-215A 0.1 f 0.1 f +12v 5k 5k fsk output (low level) 2.5v pp f1 f2 fsk output 10k c 0 5k r x keying input +5v 0v 0.1 f 3k 10k 10v pp f1 f2 phase comp. 5 4 15 7 1 3 2 14 13 9 v ee 10 12 11 6 vco op amp frequency synthesis in frequency synthesis applications, a programmable counter or divide-by-n circuit is connected between the vco output (pin 15) and one of the phase detector inputs (pins 4 or 6), as shown in figure 23. the principle of operation of the circuit can be briefly explained as follows: the counter divides down the oscillator frequency by the programmable divider modulus, n. thus, when the entire system is phase-locked to an input signal at frequency, f s , the oscillator output at pin 15 is at a frequency (nf s ), where n is the divider modulus. by proper choice of the divider modulus, a large number of discrete frequencies can be synthesized from a given reference frequency. the low-pass filter capacitor c 1 is normally chosen to provide a cut-off frequency equal to 0.1% to 2% of the signal frequency, f s .
XR-215A 25 rev. 1.01 16 v cc op amp figure 23. circuit connection for frequency synthesis c c 0.1 f +5v n 10k cc level shifter vco output fo=nfs 20k input f=fs cc u1 XR-215A rx 4k 1k binary range select (optional) 20k -5v c 0 20k c 1 sn7493 or equivalent phase comp. vco 5 8 4 15 7 1 3 2 14 13 9 v ee 10 12 11 6 c 1 the circuit was designed to operate with commercially available monolithic programmable counter circuits using ttl logic, such as mc4016, sn5493 or equivalent. the digital or analog tuning characteristics of the vco can be used to extend the available range of frequencies of the system, for a given setting of the timing capacitor c 0 . typical input and output waveforms for n = 16 operation with f s = 100khz and f o = 1.6mhz are shown in figure 24. figure 24. typical input/output waveforms for n=16 top: input (100khz) bottom: vco output (1.6mhz)
XR-215A 26 rev. 1.01 tracking filter/discriminator the wide tracking range of the XR-215A allows the system to track an input signal over a 3:1 frequency range, centered about the vco free running frequency. the tracking range is maximum when the binary range- select (pin 10) is open circuited. the circuit connections for this application are shown in figure 25. typical tracking range for a given input signal amplitude is shown in figure 26. recommended values of external components are: 1k < r 0 < 4k and 30 c 0 < c 1 < 300 c 0 where the timing capacitor c 0 is determined by the center frequency requirements (see figure 8. ) 16 v cc figure 25. circuit connection for tracking filter applications +12v 0.1 f 5k 5k u1 XR-215A 0.1 f signal input vs ro 2k 2k 0.1 f 2k cc 10k vco output 10k discriminator output 300pf c 0 r f r p 20k c 1 c 1 50 50 phase comp. op amp. 5 8 4 15 7 1 3 2 14 13 9 v ee 10 12 11 6 vco
XR-215A 27 rev. 1.01 the phase-comparator output voltage is a linear measure of the vco frequency deviation from its free-running value. the amplifier section, therefore, can be used to provide a filtered and amplified version of the loop error voltage. in this case, the dc output level at pin 15 can be adjusted to be directly proportional to the difference between the vco free-running frequency, fo, and the input signal, fs. the entire system can operate as a alinear discriminatoro or analog afrequency-metero over a 3:1 change of input frequency. the discriminator gain can be adjusted by proper choice of r 0 or r f , for the test circuit of figure 25 , the discriminator output is approximately (0.7 r 0 r f ) mv per % of frequency deviation where r 0 and r f are in k . output non-linearity is typically less than 1% for frequency deviations up to + 15%. figure 28 shows the normalized output characteristics as a function of input frequency, with r 0 = 2k and r f = 36k . crystal-controlled pll the XR-215A can be operated as a crystal-controlled phase-locked loop by replacing the timing capacitor with a crystal. a circuit connection for this application is shown in figure 28. normally a small tuning capacitor ( 30pf) is required in series with the crystal to set the crystal frequency. for this application the crystal should be operated in its fundamental mode. typical pull-in range of the circuits is + 1khz at 10mhz. there is some distortion on the demodulated output. ???????????????????? ???????????????????? ???????????????????? ???????????????????? ???????????????????? ???????????????????? ???????????????????? ???????????????????? ???????????????????? ???????????????????? ???????????????????? ???????????????????? ???????????????????? figure 26. tracking range vs. input amplitude (pin 10 open circuited) tracking range normalized temperature range (f/f o ) 0.5 1.0 2.0 1.0 10 100 1000 r 0 = 2k signal input (mv rms)
XR-215A 28 rev. 1.01 figure 27. typical discriminator output characteristics for tracking filter applications ??????????????? ??????????????? ??????????????? ??????????????? ??????????????? ??????????????? ??????????????? ??????????????? ??????????????? ??????????????? ??????????????? normalized tracking range (f/f o ) slope = 50mv per % +3 +2 +1 0 -1 -2 -3 0.4 0.6 0.8 1.0 1.2 1.4 1.6 r 0 = 2k r f = 36k v in = 50mv rms change of frequency normalized output (volts) 16 v cc figure 28. typical circuit connection for crystal-controlled pll. +12v 0.1 f 0.1 f 5k 5k signal input vs 0.01 f u1 XR-215A 20k 16k vco output 0.01 f 10k demodulated ouput 10nf 100k 300pf 30pf 10mhz crystal fundamental mode 10k 10nf 10nf 1k 50 50 vco phase comp. op amp. 5 8 4 15 7 1 3 2 14 13 9 v ee 10 12 11 6
XR-215A 29 rev. 1.01 16 lead plastic dual-in-line (300 mil pdip) rev. 1.00 16 1 9 8 d e b 1 a 1 e 1 e a l b seating plane symbol min max min max inches a 0.145 0.210 3.68 5.33 a 1 0.015 0.070 0.38 1.78 a 2 0.115 0.195 2.92 4.95 b 0.014 0.024 0.36 0.56 b 1 0.030 0.070 0.76 1.78 c 0.008 0.014 0.20 0.38 d 0.745 0.840 18.92 21.34 e 0.300 0.325 7.62 8.26 e 1 0.240 0.280 6.10 7.11 e 0.100 bsc 2.54 bsc e a 0.300 bsc 7.62 bsc e b 0.310 0.430 7.87 10.92 l 0.115 0.160 2.92 4.06 a 0 15 0 15 millimeters a a 2 c note: the control dimension is the inch column e b e a
XR-215A 30 rev. 1.01 symbol min max min max a 0.093 0.104 2.35 2.65 a 1 0.004 0.012 0.10 0.30 b 0.013 0.020 0.33 0.51 c 0.009 0.013 0.23 0.32 d 0.398 0.413 10.10 10.50 e 0.291 0.299 7.40 7.60 e 0.050 bsc 1.27 bsc h 0.394 0.419 10.00 10.65 l 0.016 0.050 0.40 1.27 a 0 8 0 8 inches millimeters 16 lead small outline (300 mil jedec soic) rev. 1.00 e 16 9 8 d e h b a l c a 1 seating plane a note: the control dimension is the millimeter column 1
XR-215A 31 rev. 1.01 notes
XR-215A 32 rev. 1.01 notice exar corporation reserves the right to make changes to the products contained in this publication in order to im- prove design, performance or reliability. exar corporation assumes no responsibility for the use of any circuits de- scribed herein, conveys no license under any patent or other right, and makes no representation that the circuits are free of patent infringement. charts and schedules contained here in are only for illustration purposes and may vary depending upon a user's specific application. while the information in this publication has been carefully checked; no responsibility, however, is assumed for inaccuracies. exar corporation does not recommend the use of any of its products in life support applications where the failure or malfunction of the product can reasonably be expected to cause failure of the life support system or to significantly affect its safety or effectiveness. products are not authorized for use in such applications unless exar corporation receives, in writing, assurances to its satisfaction that: (a) the risk of injury or damage has been minimized; (b) the user assumes all such risks; (c) potential liability of exar corporation is adequately protected under the circum- stances. copyright 1975 exar corporation datasheet june 1997 reproduction, in part or whole, without the prior written consent of exar corporation is prohibited.

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